【電磁技術在線】【EDA篇】- 3. 電源仿真

講師：Waldemar Schulz

00：00 PDN簡介

03：15 IR drop 直流壓降

06：00 PI analysis 交流阻抗

20：30 PI 工作流程

25：45 PI 電源完整性 Demo

30：45 Decap 工作流程

35：00 Decap 去耦電容優化 Demo

PDN ensures supplying clean power to the electronic devices, and reference to active devices in a die; it also serves as good reference for high speed signal and ensure that the legal limits of EMC radiation are not violated. The analysis of PDN quality at both DC and AC level is called PI analysis.

The goal of an IR-Drop task is to analyze the amount of voltage drop on a power/ground system by a given DC current consumption on one or more power pins of I/O devices. For a correct usage of this workflow it is necessary to correctly set up the power/ground nets and as well all the involved components. Especially components of type voltage source, voltage regulator and current drain (sink) have to be defined correctly. Otherwise the detection of participating components will not work correctly.

Four key components:

• VRM (Voltage Regulator Module): Supplies the power to active device.

• Capacitors (Decoupling/Bypass): Help bypass the power to active device.

• PCB parasitic impedanc:  Built-in property of power plan.

• Active devic: Consists of on-package Decapin several cases.

All are considered in PI analysis with CST Studio

The EDA Decap Tool is designed in order to easily manipulate the population of decoupling capacitors (decaps) on a board, with direct visual feedback of the impedance profiles. The impedance profiles are automatically stored and can be reloaded at any given time. Furthermore the user has the ability to set up a target impedance and can try different configurations to reach satisfactory results.